Codasip
RISC-V processor IP and design tools with CHERI memory protection for chip makers in regulated markets
Highlights
- New on EvolcAdded 2026-10-19
About Codasip
Codasip develops RISC-V processor cores and Codasip Studio, a design automation toolset for customizing processors. Its website describes CHERI-based memory protection in its RISC-V cores and a commercial CHERI RISC-V 64-bit application core.
Customers are semiconductor and chip design teams. The website lists use cases in critical national infrastructure, defense, avionics and aerospace, and automotive, industrial and IoT. It describes architecture licenses for its IP, custom compute work, and customer-tailored secure systems and platforms.
Codasip was founded in 2014 after roughly ten years of research at Brno University of Technology, according to the company's history page. Its headquarters is in Brno, Czech Republic, and the website mentions strategic design centers in France, the United Kingdom, Greece and Spain without naming their cities. The company lists open positions on its careers page. An April 2026 press release on the website announces a strategic pivot and divestiture.
Product: Processor IP cores (RISC-V, with CHERI memory protection) and the Codasip Studio processor design automation toolset.
Open jobs
Leadership
- Ron Black · Chief Executive OfficerSource: company website
- Jamie Broome · Chief Product OfficerSource: company website
- Kateřina Smrčková · Chief People OfficerSource: company website
- Vladimír Koutný · Chief Financial OfficerSource: company website
- Zdeněk Přikryl · Chief Technology OfficerSource: company website
- Carl Shaw · VP SW EngineeringSource: company website
- Ed Butler · VP SW EngineeringSource: company website
Tech stack
- BambooHR
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- OneTrust
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- jQuery